View XR81111_8993716.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? 2014 exar corporation XR81111 universal clock - high frequency lvpecl clock synthesizer exar.com/XR81111 rev 1b 1 / 12 general description the XR81111-ca04 is a clock synthesizer with intege r divider, lvpecl driver, 3.3v/2.5v supply, taking a 25mhz xtal input and providing one of four selectable output frequencies. the device is optimi zed for use with a 25mhz crystal (or system clock) and generates a selection of output frequencies - 156.25mhz for 10ge/xaui, 150mhz for sas, 125mhz for ge and 100mhz for pcie applications. the application diagram below shows a typical synth esizer configuration with any standard crystal oscillating in fundamenta l mode. internal load capacitors are optionally available to minimize/eli minate external crystal loads. a system clock can also be used to overdrive the oscillator for a syn- chronous timing system. the typical phase noise plot below shows the jitter integrated over the 12khz to 20mhz range that is widely used in wan sys tems. most lan applications however use the integration range of 1 .875mhz to 20mhz. these clock devices show a very good high frequency noise floor below - 150db. the XR81111 is a family of universal clock synthesize r devices in qfn-10 packages that are footprint compatible with industr y standard 5mm x 7mm oscillators. the devices generate any frequency in the range of 100 mhz to 1.5ghz by utilizing a highly flexible delta sigma modu lator and a wide rang- ing vco. the high clock frequency lvpecl outputs hav e very low phase noise jitter of sub 0.6ps, while consuming extremely low power. these devices can be used with standard crystals or external system clock and can be configured to select from four different frequen cy multiplier settings to support a wide variety of applications. this family of products have an extremely low power pll block with core power consu mption less than 40% of the equivalent devices from competition. by seco nd sourcing several of the existing sockets, these devices provides a very c ompelling power effi- ciency value benefit across all market segments. other clock multiplier and/or driver configurations are possible in this clock family and can be requested from the factory features ? XR81111-ca04: factory configured ? footprint compatible with 5mm x 7mm differen- tial oscillators ? one differential lvpecl output pair ? crystal oscillator interface which can also be overdriven using a single-ended reference clock ? output frequency range: 100mhz - 156.25mhz ? crystal/input frequency: 25mhz, parallel resonant crystal ? vco range: 2ghz - 3ghz ? rms phase jitter @ 156.25mhz, 12khz - 20mhz: <0.60ps ? full 3.3v or 2.5v operating supply ? -40c to 85c ambient operating temperature ? lead-free (rohs 6) package applications ? 10ge, ge lan/wan ? 2.5g/10g sonet/sdh/otn ? xdsl, pcie ? low-jitter clock generation ? synchronized clock systems ordering information C page 12 typical application v cc 2.5v or 3.3v q 100 mhz to 156.25mhz v e e q oe xtal_in xtal_out fsel1 fsel0 25mhz enable freq select XR81111 r ca04 XR81111 phase noise (dbc/hz) 100hz 1khz 10khz 100 khz 1mhz 10mhz -120db -160db -140db -100db -80db -60db -180db -40db rms jitter = 532.3fs int range 12khz to 20mhz
? 2014 exar corporation XR81111 2 / 12 exar.com/XR81111 rev 1b absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any maximum rating condition for extende d periods may affect device reliability and lifetime. supply voltage..................................... .....................+4.2v input voltage...................................... -0.5v to vcc + 0.5v output voltage...................................-0 .5v to vcc + 0.5v reference frequency/input crystal.........10mhz to 60mh z storage temperature................................ -55c to +125c lead temperature (soldering, 10 sec)............... ......300c esd rating (hbm - human body model)................. ...2kv operating conditions operating temperature range.....................-40 c to +85c
? 2014 exar corporation XR81111 3 / 12 exar.com/XR81111 rev 1b electrical characteristics unless otherwise noted: t a = -40c to +85c, v cc = 3.3v5% or 2.5v5%, v ee = 0v symbol parameter conditions * min typ max units 3.3v power supply dc characteristics v cc power supply voltage ? 3.135 3.3 3.465 v i ee power supply current measured at 156.25mhz and inclu des the output load current 68 ma 2.5v power supply dc characteristics v cc power supply voltage ? 2.375 2.5 2.625 v i ee power supply current measured at 156.25mhz and inclu des the output load current 58 ma lvcmos/lvttl dc characteristics v ih input high voltage v cc = 3.465v ? 2.42 v cc + 0.3 v v cc = 2.625v ? 1.83 v cc + 0.3 v v il input low voltage v cc = 3.465v ? -0.3 1.03 v v cc = 2.625v ? -0.3 0.785 v i ih input high current (oe, fsel[1:0]) v in = v cc = 3.465v or 2.625v ? 15 a i il input low current (oe, fsel[1:0]) v in = 0v, v cc = 3.465v or 2.625v ? -10 a lvpecl dc characteristics v oh output high voltage ? v cc - 1.3 v cc - 0.4 v v ol output low voltage ? v cc - 2.0 v cc - 1.6 v v swing peak-to-peak output voltage swing ? 0.6 1.2 v crystal characteristics x mode mode of oscillations fundamental x f frequency 25 mhz esr equivalent series resistance 50 c s shunt capacitance 7 pf ac characteristics f out output frequency see table 1. 100 156.25 mhz symbol parameter conditions * min typ max units
? 2014 exar corporation XR81111 4 / 12 exar.com/XR81111 rev 1b * limits applying over the full operating temperatu re range are denoted by a ?. t jit ( i ) rms phase jitter 156.25mhz integration range 12khz-20mhz 0.6 ps 150mhz integration range 12khz-20mhz 0.6 ps 125mhz integration range 12khz-20mhz 0.6 ps 100mhz integration range 12khz-20mhz 0.6 ps t jit (cc) cycle-to-cycle jitter using 25mhz, 18pf resonant crystal ? 10 ps t r /t f output rise/fall time 20% to 80% ? 100 450 ps odc output duty cycle ? 48 52 % symbol parameter conditions * min typ max units
? 2014 exar corporation XR81111 5 / 12 exar.com/XR81111 rev 1b pin configuration pin assignments pin no. pin name type description 1 oe input (900k : pull-up) output enable pin - lvcmos/lvttl active high input. outputs are enabled when oe = high. outputs are disabled when oe = low. 2 reserved reserved, leave this pin unconnected. 3 v ee supply negative supply pin. 4 xtal_out output crystal oscillator output. 5 xtal_in input crystal oscillator input. 6 q output positive lvpecl output. 7 q output inverted lvpecl output. 8 v cc supply power supply pin. 9 fsel0 input (900k : pull-dwn) output frequency select pin, lsb (lvcmos/lvttl inpu t). 10 fsel1 input (900k : pull-dwn) output frequency select pin, msb (lvcmos/lvttl input). 12 3 4 5 6 7 8 10 9 oe reserved v ee q q v cc fsel1 fsel0 xtal_in xtal_out
? 2014 exar corporation XR81111 6 / 12 exar.com/XR81111 rev 1b functional block diagram osc pdf & lpf vco divide by n divide by m control logic qq fsel0 fsel1 xtal_in xtal_out oe
? 2014 exar corporation XR81111 7 / 12 exar.com/XR81111 rev 1b typical performance characteristics figures 1,2,3 and 4 show typical phase noise perform ance plots for 156.25 mhz, 150mhz, 125m, and 100mhz clock out- puts respectively. the data was taken using the ind ustry standard agilent e5052b instrument. the integ ration range is the widely referenced 12khz to 20mhz range most often u sed in wan applications. figure 1: 156.25mhz operation, phase noise at 3.3v figure 2: 150mhz operation, phase noise at 3.3v)
? 2014 exar corporation XR81111 8 / 12 exar.com/XR81111 rev 1b figure 3: 125mhz operation, phase noise at 3.3v figure 4: 100mhz operation, phase noise at 3.3v
? 2014 exar corporation XR81111 9 / 12 exar.com/XR81111 rev 1b application information functional truth table the XR81111-ca04 has two frequency select pins, fslel[1:0], that determine the output frequency fro m the device. with the two fsel inputs, one of 4 differen t clock rates can be selected. this allows the XR81111-ca04 to support a variety of applications such as pci expre ss, ethernet, sas and 10ge for example. if the fsel pin s are left floating, the XR81111-ca04 will default (with internal pull-down resistors on the fsel inputs) to the 100m hz out- put configuration. termination for lvpecl outputs the termination schemes shown in figure 5 and figure 6 are typical for lvpecl outputs. matched impedance l ayout techniques should be used for the lvpecl output pai rs to minimize any distortion that could impact your maxi mum operating frequency. figure 7 is an alternate termin ation scheme that uses a y-termination approach. figure 5: XR81111 3.3v lvpecl output termination figure 6: XR81111 2.5v lvpecl output termination figure 7: XR81111 alternate lvpecl output terminati on using y-termination output signal timing definitions the following diagrams clarify the common definitio ns of the ac timing measurements. figure 8: cycle-to-cycle jitter table 1: output frequency selection fsel[1:0] xtal (mhz) output frequency (mhz) applications 00 25 100 pci express 01 25 125 ethernet 10 25 150 sas 11 25 156.25 10ge, xaui 3.3v 3.3v 3.3v 50 : 50 : 130 : 130 : 82 : 82 : lvpecl output lvpecl input 2.5v 2.5v 2.5v 50 : 50 : : : : : lvpecl output lvpecl input vcc vcc 50 : 50 : 50 : 50 : lvpecl output lvpecl input rtt for 3.3v systems rtt = 50 : for 2.5v systems rtt = 19 : q nq t cycle n t cycle n+1 t jit(cc) = |t cycle n - t cycle n+1| (over 1000 cycles)
? 2014 exar corporation XR81111 10 / 12 exar.com/XR81111 rev 1b figure 9: output rise/fall time and swing figure 10: output period and duty cycle 20% 80% t r t f 80% 20% v swing q nq q nq t pw t period odc = x 100% t pw t period
? 2014 exar corporation XR81111 11 / 12 exar.com/XR81111 rev 1b mechanical dimensions 10-pin qfn
? 2014 exar corporation XR81111 12 / 12 exar.com/XR81111 rev 1b for further assistance: email: commtechsupport@exar.com exar technical documentation: http://www.exar.com/techdoc/ exar corporation headquarters and sales offices 48720 kato road tel: +1 (5 10) 668-7000 fremont, ca 95438 - usa fax: +1 (510) 66 8-7001 notice exar corporation reserves the right to make changes to the products contained in this publication in o rder to improve design, performance or reliability. exar corporation assumes no responsibility for the use of any circuit s described herein, conveys no license under any pat ent or other right, and makes no representation tha t the circuits are free of patent infringement. charts and schedules contai ned herein are only for illustration purposes and m ay vary depending upon a users specific application. while the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracie s. exar corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reaso nably be expected to cause failure of the life support system or to signi ficantly affect its safety or effectiveness. products are not authorized for use in such applications un less exar corporation receives, in writing, assurances to its satisfactio n that: (a) the risk of injury or damage has been mi nimized; (b) the user assumes all such risks; (c) p otential liability of exar cor- poration is adequately protected under the circumsta nces. reproduction, in part or whole, without the prior w ritten consent of exar corporation is prohibited. ordering information revision history part number package green operating temperature range shipping packaging marking XR81111-ca04-f 10-pin qfn yes -40c to +85c tube/tray t 111 XR81111-ca04tr-f 10-pin qfn yes -40c to +85c tape & r eel t111 XR81111evb eval board n/a n/a n/a n/a revision date description 1a april 2014 initial release. 1b april 28, 2014 updates to general description and package drawing. [ecn1421-15 l 05/25/2014]

▲Up To Search▲

Price & Availability of XR81111

	To Download XR81111 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .